Parallel Clustering Algorithms on a Reconfigurable Array of Processors with Wider Bus Networks

Clustering techniques are usually used in pattern recognition, image segmentation and object detection. For N patterns and k centers each with M features, i n this paper, we first design an O ( k M ) time optimal parallel algorithm for one pass process of clustering with the Ic-means method on a linear array of processors with a wider bus network using N I + ; processors with one bus network, where c is any constant a,nd c 2 1. Then, based on the proposed algorithm, two O ( k ) and O(1) t ime optimal parallel clustering algorithms are also derived using M N 1 + $ and k M N ' + t processors with M row and M N row bus networks, respectzvely. These results improve the best known bounds and achieve cost optimal in their t ime and processor complexities.